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Showing posts from March, 2015

Control Design: MOV-8, ALU and SETAB (part 1 of 2)

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Over the last five posts I've been building up the design of a set of cards so that the computer will be able to understand and perform the MOV-8, ALU and SETAB instructions. In this post I'm putting together the final piece of the jigsaw ... the control card. This will take the instruction class from the decoder (which derives its result from the instruction register) along with the pulses generated by the sequencer to operate the various control lines of the computer as required.

There's quite a bit of ground to cover here so I'll visit the design of each individual instruction first in this post and then I can move on to bringing all the parts together on the new control card in my next post.
MOV-8: 8-bit Move This instruction is the 8-bit move which selects the value in a given register on to the data bus and then loads another register with that value. The instruction has the code 'MOV-8' but you'll often see the shorter 'MV8' used in the contr…

Pulse Distribution Design: Pulses C,D and E

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In my last post I covered the design of the 8-cycle finite state machine (FSM). In this post I'll now take the outputs from that FSM and combine them to produce the timing pulses that will be needed to perform the MOV-8, ALU and SETAB instructions. The sequencer and pulse distribution share a 'double' card and so I'll also cover the resulting design when these two systems are combined.

To quickly recap ... the 8-cycle FSM will produce the following states given a clock signal as an input:
Producing the instruction timing pulses is very straightforward and is just a case of either taking the FSM states directly or combining them together so that we get the following:
It really is as simple as that ... all the hard work has been done in the design of the FSM. Where two or more FSM states are combined I'll use diodes to stop any feedback upsetting the FSM - effectively the didoes act as a logic OR gate. Later on I'll cover the control board design which will take…